CMOS Logic Levels
The voltage thresholds that decide whether a wire reads as 0 or 1. Getting them wrong is how you fail to read a UART, or destroy the chip you were trying to read.
Logic levels are the voltage ranges a digital input interprets as low or high. Every wire you probe on a board carries one, and matching yours to the target's is the difference between a clean capture, silence, and a dead chip.
The four thresholds
Each side of a link has two:
Driver output Receiver input
VOH minimum high VIH minimum voltage read as high
VOL maximum low VIL maximum voltage read as low
Between VIL and VIH is undefined: the input may read either way, and may oscillate. A working link needs the driver's VOH comfortably above the receiver's VIH, and its VOL comfortably below VIL. The gap is the noise margin.
The common families
| supply | logic high (typical VIH) | logic low (typical VIL) | where you meet it |
|---|---|---|---|
| 5 V TTL | > 2.0 V | < 0.8 V | older boards, Arduino, some serial gear |
| 3.3 V CMOS | > 2.0 V | < 0.8 V | the default on modern embedded boards |
| 1.8 V CMOS | > 1.17 V | < 0.63 V | modern SoCs, phone-class hardware, some flash |
| 2.5 V, 1.2 V | less common, but they exist |
3.3 V is the safe assumption on a modern board and it is not a safe assumption on any specific board. 1.8 V is increasingly common on anything phone-derived, and mixed-voltage boards exist where the UART is 3.3 V and the flash is 1.8 V.
Note the naming trap: people say "TTL serial" for what is almost always 3.3 V or 5 V CMOS logic, not actual TTL. The label is a habit, not a specification.
Why mismatches fail in both directions
- Your adapter at 5 V, the target at 3.3 V or 1.8 V. You are pushing well past the target's absolute maximum input rating. This damages the pin, and often the chip. It is the expensive mistake, and it is silent: the board may keep working for hours before failing.
- Your adapter at 3.3 V, the target at 1.8 V. Same problem, less margin, still damaging.
- Your adapter at 1.8 V, the target at 3.3 V. No damage, but your
VOHof 1.8 V may not clear the target'sVIHof 2.0 V, so the target never sees your transmissions. Reception may work while transmission silently does not, which is a genuinely confusing failure mode.
Measuring before connecting
This is the whole discipline, and it takes a minute:
- With the board powered and idle, measure the candidate pin against ground with a
multimeter. A UART TX line idles high, and that idle voltage is the logic level: 3.3 V, 1.8 V, or 5 V. - Confirm ground first, with continuity to a shield or a known ground pad, before referencing anything to it.
- Look at the regulator and the SoC markings. A board whose main rail is 1.8 V will not have 3.3 V signalling on the SoC pins.
- Only then set your adapter, and only then connect. Many adapters have a voltage selector that is easy to leave on the wrong setting.
A logic-analyzer also needs its threshold set correctly, or it will show garbage on a perfectly good signal.
Level shifting
When the two sides differ, use a level shifter rather than hoping. A bidirectional MOSFET-based shifter handles open-drain buses such as I2C; a dedicated buffer is better for fast unidirectional lines such as SPI clock. A resistor divider works for one direction only, is slow enough to matter on fast signals, and is a stopgap rather than a solution.
Some parts are advertised as 5 V tolerant, meaning their inputs survive 5 V while running from 3.3 V. Tolerance is per-pin and stated in the datasheet; it is never a property of a whole chip you can assume.
Pitfalls
- Connecting your adapter's
VCCto a board that is already powered. Ground and the data lines are what you need; supplying power from two sources is how boards die. - Assuming a 3.3 V board has 3.3 V on every pin. Measure the pin you intend to touch.
- Floating inputs. An unconnected CMOS input sits in the undefined region and picks up noise, so it reads as neither.
- Forgetting the threshold setting on the analyser after switching targets.
What it pairs with
multimetre measures it, logic-analyzer needs it configured, uart and uart-header are where you meet it first, and pcb-anatomy covers finding the pins in the first place.
Further reading
Used in these courses
UART is the most common debug interface left exposed on IoT devices. This course takes you from understanding the electrical signal all the way to getting a root shell - the exact path a hardware hacker follows in the field. Every major embedded device you'll ever audit has UART. Learn it once, use it everywhere.
PCB Reading for Hackers**Beginner** course. Look at a PCB photo and name what you see in 30 seconds - SoC, RAM, SPI flash, UART header, JTAG pads, chip packages (SOIC, QFN, BGA). Visual literacy that UART and Flash Chip Extraction silently assume. No hardware, no tools - just photos.