Gear / Debug & automotive / JTAG/SWD probe
JTAG

JTAG/SWD probe

Halt the CPU, read memory, extract keys. A cheap ST-Link for SWD, an FT2232H for full JTAG.
3–25€ Debug & automotive
JTAG/SWD probe

What it does

JTAG and SWD are hardware debug interfaces that give direct halt, single-step, and memory read/write access to a processor's core. An enabled debug port is total control: dump internal flash, bypass readout protection, patch RAM, and read keys live. A cheap ST-Link covers SWD on ARM parts; an FT2232H-based adapter drives full JTAG for a wider range of chips.

Use cases

01
Dump internal flash

Halt the core and read out the microcontroller's own flash, bypassing whatever the running firmware would show you.

02
Bypass a partial readout lock

Some read-out protection levels can be downgraded through a defined (if destructive) debug sequence.

03
Patch and single-step

Attach GDB through the probe to set breakpoints and inspect registers live.

How you use it

Find the port (JTAGulator brute-forces an unknown pinout), connect a probe, then bridge it to GDB with OpenOCD:

openocd -f interface/stlink.cfg -f target/stm32f1x.cfg
# in another shell, via the telnet console on :4444
halt
dump_image firmware.bin 0x08000000 0x10000

Wiring

Probe Target SWDIO SWCLK GND VTref RST SWDIO SWCLK GND VTref RST
VTref only senses the target's logic level (3.3V typically), never powers it. RST is optional and depends on the target. Full JTAG adds TDI and TDO; SWD is the ARM two-wire subset (SWDIO/SWCLK) of the same TAP.
Variants & pitfalls

All-0xFF or all-0x00 dumps. That pattern usually means read-out protection (RDP/CRP) is active, not that the wiring is wrong.

Match interface and target configs. OpenOCD needs the right interface and target .cfg pair or the scan chain is never found.